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STM8S208MBT6B

型號: STM8S208MBT6B
產(chǎn)品詳情

Description

The STM8S20xxx performance line 8-bit microcontrollers offer from 32 to 128 Kbytes Flash program memory. They are referred to as high-density devices in the STM8S microcontroller family reference manual. All STM8S20xxx devices provide the following benefits: reduced system cost, performance robustness, short development cycles, and product longevity.
The system cost is reduced thanks to an integrated true data EEPROM for up to 300 k write/erase cycles and a high system integration level with internal clock oscillators, watchdog, and brown-out reset.
Device performance is ensured by 20 MIPS at 24 MHz CPU clock frequency and enhanced characteristics which include robust I/O, independent watchdogs (with a separate clock source), and a clock security system.
Short development cycles are guaranteed due to application scalability across a common family product architecture with compatible pinout, memory map and modular peripherals. Full documentation is offered with a wide choice of development tools.
Product longevity is ensured in the STM8S family thanks to their advanced core which is made in a state-of-the art technology for applications with 2.95 V to 5.5 V operating supply.
  • All features

    • Core

      • Max fCPU: up to 24 MHz, 0 wait states @ fCPU≤ 16 MHz

      • Advanced STM8 core with Harvard architecture and 3-stage pipeline

      • Extended instruction set

      • Max 20 MIPS @ 24 MHz


    • Memories

      • Program: up to 128 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles

      • Data: up to 2 Kbytes true data EEPROM; endurance 300 kcycles

      • RAM: up to 6 Kbytes


    • Clock, reset and supply management

      • 2.95 to 5.5 V operating voltage

      • Low power crystal resonator oscillator

      • External clock input

      • Internal, user-trimmable 16 MHz RC

      • Internal low power 128 kHz RC

      • Clock security system with clock monitor

      • Wait, active-halt, & halt low power modes

      • Peripheral clocks switched off individually

      • Permanently active, low consumption power-on and power-down reset


    • Interrupt management

      • Nested interrupt controller with 32 interrupts

      • Up to 37 external interrupts on 6 vectors


    • Timers

      • 2x 16-bit general purpose timers, with 2+3 CAPCOM channels (IC, OC or PWM)

      • Advanced control timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

      • 8-bit basic timer with 8-bit prescaler

      • Auto wakeup timer

      • Window watchdog, independent watchdog


    • Communications interfaces

      • High speed 1 Mbit/s active beCAN 2.0B

      • UART with clock output for synchronous operation - LIN master mode

      • UART with LIN 2.1 compliant, master/slave modes and automatic resynchronization

      • SPI interface up to 10 Mbit/s

      • I2C interface up to 400 Kbit/s


    • 10-bit ADC with up to 16 channels

    • I/Os

      • Up to 68 I/Os on an 80-pin package including 18 high sink outputs

      • Highly robust I/O design, immune against current injection

      • Development support

      • Single wire interface module (SWIM) and debug module (DM)


    • 96-bit unique ID key for each device


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