The STM32F302xB/STM32F302xC family is based on the high-performance ARM?Cortex?-M4 32-bit RISC core with FPU operating at a frequency of up to 72 MHz, and embedding a floating point unit (FPU), a memory protection unit (MPU) and an embedded trace macrocell (ETM). The family incorporates high-speed embedded memories (up to 256 Kbytes of Flash memory, up to 40 Kbytes of SRAM) and an extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer up to two fast 12-bit ADCs (5 Msps), four comparators, two operational amplifiers, up to one DAC channel, a low-power RTC, up to five general-purpose 16-bit timers, one general-purpose 32-bit timer, and one timer dedicated to motor control. They also feature standard and advanced communication interfaces: up to two I2Cs, up to three SPIs (two SPIs are with multiplexed full-duplex I2Ss), three USARTs, up to two UARTs, CAN and USB. To achieve audio class accuracy, the I2S peripherals can be clocked via an external PLL. The STM32F302xB/STM32F302xC family operates in the -40 to +85 °C and -40 to +105 °C temperature ranges from a 2.0 to 3.6 V power supply. A comprehensive set of power-saving mode allows the design of low-power applications. The STM32F302xB/STM32F302xC family offers devices in three packages ranging from 48 pins to 100 pins. The set of included peripherals changes with the device chosen.
All features
Core: ARM?Cortex?-M4 32-bit CPU with FPU (72 MHz max), single-cycle multiplication and HW division, DSP instruction and MPU (memory protection unit)
Operating conditions:
VDD, VDDAvoltage range: 2.0 V to 3.6 V
Memories
128 to 256 Kbytes of Flash memory
Up to 40 Kbytes of SRAM, with HW parity check implemented on the first 16 Kbytes.
CRC calculation unit
Reset and supply management
Power-on/Power-down reset (POR/PDR)
Programmable voltage detector (PVD)
Low-power modes: Sleep, Stop and Standby
VBATsupply for RTC and backup registers
Clock management
4 to 32 MHz crystal oscillator
32 kHz oscillator for RTC with calibration
Internal 8 MHz RC with x 16 PLL option
Internal 40 kHz oscillator
Up to 87 fast I/Os
All mappable on external interrupt vectors
Several 5 V-tolerant
Interconnect matrix
12-channel DMA controller
Two ADCs 0.20 μS (up to 17 channels) with selectable resolution of 12/10/8/6 bits, 0 to 3.6 V conversion range, single ended/differential input, separate analog supply from 2 to 3.6 V
One 12-bit DAC channel with analog supply from 2.4 to 3.6 V
Four fast rail-to-rail analog comparators with analog supply from 2 to 3.6 V
Two operational amplifiers that can be used in PGA mode, all terminals accessible with analog supply from 2.4 to 3.6 V
Up to 24 capacitive sensing channels supporting touchkey, linear and rotary touch sensors
Up to 11 timers
One 32-bit timer and two 16-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
One 16-bit 6-channel advanced-control timer, with up to 6 PWM channels, deadtime generation and emergency stop
One 16-bit timer with 2 IC/OCs, 1 OCN/PWM, deadtime generation and emergency stop
Two 16-bit timers with IC/OC/OCN/PWM, deadtime generation and emergency stop
Two watchdog timers (independent, window)
SysTick timer: 24-bit downcounter
One 16-bit basic timer to drive the DAC
Calendar RTC with Alarm, periodic wakeup from Stop/Standby
Communication interfaces
CAN interface (2.0B Active)
Two I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from STOP
Up to five USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control)
Up to three SPIs, two with multiplexed half/full duplex I2S interface, 4 to 16 programmable bit frames